EngineeringFeatured
How ChipForge Validates Chip Designs
On most subnets, the hard part is the task. On ChipForge, the hard part is proving the task can be judged correctly — before a single miner ever sees it.
March 27, 20268 min read
Engineering blog
Notes from the lab
How we build and verify chips in the open: engineering deep dives, releases and announcements.
EngineeringFeatured
We Broke Google's CoralNPU — And Then We Fixed It
Our verification pipeline uncovered multiple RTL issues in CoralNPU within five weeks. We root-caused them, fixed them properly, and contributed everything upstream.
January 20, 20266 min read
AnnouncementFeatured
ChipForge MCU: Our First Complete RISC-V Soft IP
Announcing the completion of our RV32IMC microcontroller with full scalar cryptography extensions — designed entirely through decentralized competition.
December 3, 20258 min read
All Posts
Philosophy
Why Verification Comes First in Decentralized Chip Design
Chip design should be easier — but never careless. Here's how we built a verification pipeline capable of validating real hardware from distributed contributors.
September 2, 20255 min read
Announcement
Introducing ChipForge: Democratizing Semiconductor Design
The chip industry has a $500M barrier to entry. We're building the world's first decentralized chip foundry on Bittensor to change that.
August 28, 20254 min read
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