A better AI chip, built by open competition

Engineers anywhere design an AI chip, and the kernels that run real models on it. The fastest, most efficient design wins the round.

See the live leaderboardStart mining
Network
Bittensor subnet 108
Current challenge
Round closes in
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Miners submit two things

A chip, and the kernels that make real models run on it.

Built by minersAI modelconvconvpoolfcSet by the challengeKernels14 operationsconvmatmulsoftmaxmax pool+ 10 moreNPUPE arraySRAMcontrol

How a round works

Specification: Every round opens with a specification: what to build and how it will be scored. chipforge challenge --current. Build an NPU, and kernels for it. Workload real AI models, set this round. Scored on speed, area, power. Best so far 1.00x

Submit: Miners check their design locally, then send it to the validators. evaluator run ./my_npu. Checking it locally first…. Score 1.07x, beats the best (1.00x). chipforge submit my_npu.zip. Submitted to validators

Verify: Nothing is scored until it works. Most submissions stop here. Checking the design before scoring it…. Compiles. Runs every op in the model. Output is bit-exact. 7 of 18 go on. The rest score nothing.

Benchmark: What survives runs the real models, on real numbers. Running the round's models on the NPU…. ResNet. MobileNet. MLPerf suite. Measured: speed, area, power

Reward: The best design takes the round, and becomes the bar for the next one. Final score 1.07x. Previous best 1.00x. New best design. Rewarded in TAO.. The bar is now 1.07x.

InterfacesTarget AI modelsScoring rulesmax area

Every round opens with a specification: what to build and how it will be scored.

MATRIX ENGINE256 MACs @ 1GHzVECTOR CORERVV 1.0 SIMDSCALAR CORERV32I FrontendITCM64KBDTCM64KBI-CACHE32KBD-CACHE32KBDMA CTRLMulti-ChannelMEM CTRLDDR/LPDDRSRAM BANKS256KB UnifiedNoC INTERCONNECT • AXI4τττ

ChipForge NPU

Edge AI accelerator

Real hardware, already built

  • Now building

    An AI accelerator for the edge

    Running now. Every design is scored on speed, area and power against real models.

    Follow the live results
  • Shipped

    An open RISC-V processor

    A microcontroller with built-in cryptography, designed in competition and open sourced.

    View on GitHub
  • Contributed

    Fixes to Google's Coral NPU

    Our verification found real design bugs in Google's open AI chip. We fixed them upstream.

    Read the story
Live on subnet 108

The leaderboard

Every design, ranked as validators score it.

Full leaderboard
 
Score to beat
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Pass both gates and beat it to win
Current winner
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No winner yet: emissions burn
Evaluation
Idle
Waiting for submissions
Top designsScore
Latest activity

Nothing yet.

From code to silicon

  1. Complete

    RISC-V processor

    The first processor designed through open competition.

  2. In progress

    Edge AI accelerator

    Neural processing units, scored on real AI models.

  3. Next

    Tapeout

    Winning designs submitted to an open silicon shuttle.

  4. Next

    Real silicon

    Physical chips fabricated and put in people's hands.

Build the chips AI runs on

Compete as a miner, secure the network as a validator, or follow along as the designs get better every round.

Start miningRead the docs

Questions? Talk to the team on Discord

Built on
  • τBittensor
  • RISC-V
  • Verilator
  • OpenLane